Essentially IBM Research has built a Si chip on a standard 200 mm Si wafer employing a standard CMOS fabrication process. The chip is a radio frequency (RF) receiver, acting as a normal chip, with resistors, capacitors and transistors, with one main difference - the transistor channels are made of Graphene. The chip functionality means it receives and restores wireless signals in the 4.3 GHz range.
The main breakthrough is that previous endeavors at building Graphene field-effect transistors (GFET) has used standard back-end of line (BEOL) processes. BEOL is a process where the active components, the Graphene transistor channel, are build on the wafer first, and then the rest of the passive components capacitors, resistors and inter-connects are added. Unfortunately, the problem with Graphene, is due to its weak adhesion and fragile single-atom-thick composition which in the end damages the GFETs. To counter-act this, IBM has build a series of passive components first, and then only deposits a layer of Graphene at the end of the transistor fabrication process. Please Note the IBM Research team published their findings in Nature Communications.  Original article available here
The IBM Research findings - again, provide an insight onto how DCN Corp's dip coating process can help crack the holy grail of a Graphene computer chip (consisting of a tunable band-gap). Please Note a tunable band-gap is required to enable for the interaction of standard binary digital logic - in others words enabling for a transistor to switch between 0 and 1. Therefore, if you and/or your colleagues are interested in making the above research findings reality - please ensure to contact the company as soon as practicably possible.
 Han, S-J., Garcia, A.V., Oida, S., Jenkins, K.A. and Haensch, W. Graphene radio frequency receiver integrated circuit. Nature Communications 5 (2014) Journal citation available here